1. Field of the Invention
The present invention relates generally to the field of integrated circuit design, and specifically, to a non-volatile memory integrated circuit for storing and retrieving analog signals.
2. Background Information
Conventional integrated circuit systems that store analog signals (e.g., a voice signal) includes an analog to digital converter ("ADC") to convert an input analog signal to digital bits, typically in binary format, that represents the input analog input signal. The digital bits are then stored in a digital memory such as a Dynamic Random Access Memory ("DRAM"), Static Random Access Memory ("SRAM"), or non-volatile FLASH memory. The retrieval of the analog signal is done by first reading the digital bits stored in the digital memory and then converting them to the analog signal by way of an digital to analog converter ("DAC"). One main disadvantage of using this approach is the need for DACs and ADCs. A bigger disadvantage, however, is the use of a digital memory which can only store two distinct levels of information, i.e., a "0" and a "1".
One solution used to overcome the disadvantages discussed above is described in U.S. Pat. No. 5,241,494 issued to Blyth et al. or in co-pending U.S. patent application Ser. No. 08/819,665, entitled "Analog Signal Recording and Playback Integrated Circuit and Message Management System" by Hieu Van Tran et al., both of which are assigned to the assignee of the present invention. Both the '494 patent and the patent application have the advantage of not needing DAC or ADC as the input analog signal is stored directly on EEPROM ("electrically erasable programmable read only memory") cells. That is, each EEPROM cell is capable of storing a signal that has a resolution of one part in 250 or better. As such, each memory cell can store, for example, 8 times more information. This yields a much lower cost per system.
The analog recording and playback integrated system of the present invention uses FLASH memory cells that results in an even lower cost than the two systems discusses above. This is due to a much smaller FLASH memory cell size as compared to that of an EEPROM cell. The present invention further includes specific techniques required for the flash technology as applied to analog recording and playback integrated systems. Moreover, an improved serial peripheral interface ("SPI") as compared to that described in co-pending U.S. patent application Ser. No. 08/819,665, is explained. An algorithm and circuit implementation for programming of the flash memory cells is described in detail. Complementary cells and a differential sensing circuit are used for detection of end of message ("EOM") markers to reduce the effects of threshold drift over time and temperature range.